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FPGA SmartNIC FB2CDG1@AGM39D-2

Flexible Multi-port Ethernet Intel® Agilex M Based SmartNIC

The Silicom FPGA SmartNIC FB2CDG1@AGM39D-2 is a high-performance programmable PCIe Server adapter based on the Intel® Agilex™ M-series AGMF039 FPGA (option for AGMF032). The Agilex-M™ is an extremely powerful FPGA which also features up to on-chip 32GB HBM2e memory providing an unprecedented 2 x 2.6 Tbps HBMe2 bandwidth. The card is equipped with 2 x QSFPDD56 for supporting 2x 400GE, as well as a wide range of other link speed combinations like 16×10/25GE or even 8x100G with the appropriate breakout modules and link partners.

The FB2CDG1@AGM39D-2 is made in 2 primary variants: One variant with 2 banks of DDR5 for 32GB DDR5 on the PCB. The second variant with 2 x ARF6 connectors with 16x32Gbps. The ARF6 connectors add unprecedented flexibility in host bandwidth and network connectivity. Via an adaptor cable, an additional PCIe Gen4 x16 connector can be employed for additional host bandwidth. The same connectors can alternatively be used with Fireflytm cables for connecting an additional 2x 8xSFP28 or 2x 2xQSFP28 for higher Ethernet link capacity to the solution in appliances. The connectors can also be used for direct connection of two boards or to connect multiple cards in series.

The AGM FPGA series features CXL 1.1 and 2.0, providing heterogeneous processing and computing in performance-intensive workloads like AI, machine learning and analytics.

Target Applications
    • Network Security & Telemetry
      •  Virtual Firewall (vFW)
      • DDoS Mitigation
      • IP Security (IPsec)
      • Transport Layer Security (TLS)
      • Packet monitoring and analytics
    • Network Functions
      • 5G/6G User Plane Function (UPF)
      • 5G Access Gateway Function (AGF)
      • Virtual Broadband Network Gateway (vBNG)
      • Virtual Application Delivery Controller
      • Traffic Management
      • Carrier Grade Network Address Translation (CGNAT)
      • Cloud Gateway
      • Application Access Gateway
      • General interconnect
      • ISP Interconnections
    • Application acceleration
      • Data analysis offload
      • Sensor aggregation and analysis
      • Sensor recording

Key features

Silicom FPGA SmartNIC FB2CDG1@AGM39D-2

  • Intel® Agilex™ AGMF039 FPGA
  • 2 x QSFPDD56 ports
  • HBM2e: 32GB
  • 2 x ARF6 expansion connectors each with 8x28Gbps
  • PCIe x16 Gen5 w/CXL
  • 5G SyncE PLL with Silicom TimeSync Solution (STS)
  • Dedicated RAM for HPS
  • GPIO
  • Intel® Max® 10 Board Management Controller
  • Dual slot passive heat sink (single slot optionable)
  • On-board power and temperature sensors
  • FPGA controlled link and status LEDs

Specifications

Network Interface

IEEE standard IEEE 802.3 400GbE, 200GbE, 100GbE, 25GbE, 10GbE
Interfaces
  • Physical interface: 2 x QSFPDD56 slots
  • Multimode SR4/SR8 (850nm), Single Mode LR4/LR8 (1310nm) or Direct Attached Copper (Twinax)
  • Data rate: 2×400, 4×200, 2×200, 1×400, 4×100, 16×25, 16×10 Gbps

Host Interface

PCI bus
  • PCIe 5.0 x16

General Technical Specifications

FPGA Details Intel® Agilex™ AGMF039

  • R47A package, with 3 x F and 1 x R tile
  • Speed grade -2
  • ARM HPS
  • 32GB HBM2e
  • 3 x 600GE HIPs (F-tiles)
Configuration
  • Configuration flash can be made to support multiple boot images for automatic fallback to factory default image
  • Upload of FPGA configuration to flash via PCIe – with supported image and tool
On-chip Memory
  • HBM2e, 32GB in Agilex™ M-series FPGA
On-board Memory
  • DDR4, 4GB+ECC for HPS
Expansion Connectors
  • 2 x 32pin ARF6 for 2x 8x25Gbps
  • Allows an extra x16 PCIe Gen4 via adapter for extra Host PCI BW and resources
  • Allows connection for additional network ports
On-board Clock
  • PCIe clock: 100 MHz
  • DPLL ZL30793
  • Jitter cleaner
  • 8 output reprogrammable clock generator (PLL) with SyncE support
Additional Board Support
  • On-board power and temperature sensors (via SMBus/I2C)
  • LEDs for board status and board management
Physical Dimensions
  • Weight: ~1600 g (TBD)
  • Full height, 123.4 mm
  • ¾ length, 254.0 mm (+bracket)
  • Dual Slot Passive
Environment
  • Storage temperature: TBD
  • Operating temperature: TBD
  • Hardware compliance: RoHS, FCC Class A, CE, UL
Thermal Design
  • Passive heat sink targeted to dual slot
Max Power
  • Max : 410W *)
  • 65 W max from the PCie slot
  • 345 W max from the 12V high power Aux connector *) (including optical modules)

*) The combined server-PCIe card solution may be limited in average power consumption by thermal constraints

Port LEDs
  • 2 x Link/ ACT for the 2 x QSFPDD56, on bracket
  • 1 x multi color status LED, on bracket
Time Synchronization
  • Silicom TimeSync Solution (STS)
  • IEEE 1588-2019, G8273.2, G8273.4 (T-BC/T-TSC), G8262(SyncE)
  • 1PPS In/Out, 10Mhz In/Out (optional)
  • OCXO
  • PTP stack: LinuxPTP (ptp4l) on HPS or x86
Board Management
  • Intel® Max® 10 FPGA Board Management Controller
  • Voltage level monitoring
  • Thermal shut-down protection
  • Over current protection on 12V input

Resources and Downloads

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