FPGA Card - Quad SFP+ port card supporting 4x10GE, PCIe Gen3

General Details

FPGA Card – Quad SFP+ port card supporting 4x10GE, PCIe Gen3, Xilinx® Zynq UltraScale+

The fb4XG@Z07CG is a high performance OEM hardware platform intended for hardware acceleration for mobile 4G and 5G Baseband Units or Distributed Units with four 10G SFP+ modules. The card is intended to interface to 3 Radio Units via 10G CPRI or 10G eCPRI with SFP+ modules with up to two 100MHz carriers per radio, as well as interfacing to a Grand master via SFP+ at 1G. The 4x SFP+ interfaces can alternatively be configured as 10G Ethernet interfaces.

The card is based on a Xilinx® Zynq UltraScale+ MPSoC, which embeds a Processor System (PS) with two 64-bit Application Processing Units (ARM Cortex-A53) and two Real-Time Processing Units (ARM Cortex-R5), along with a powerful Programmable Logic (PL) part (UltraScale+ FPGA).

The card can be delivered with a 4G/5G IP stack interfacing at 3GPP functional split options 8 for CPRI or 7.2x for eCPRI and the interface on the PCIe is at 3GPP functional split option 6.

Key features

fb4XG@Z07CG FPGA Card

  • Xilinx® Zynq UltraScale+ FPGA
  • 4 x SFP+ ports
  • 128M x 32-bit LPDDR4@2133MT/s
  • PCIe form-factor: Half length, standard height PCIe
  • On-board temperature sensors
  • FPGA controlled link and status LEDs
  • Passive cooling
Specifications

HOST INTERFACE
Physical bus connector: 8-lane PCIe
PCIe bus type: 1-8 lane PCIe Gen1/Gen2/Gen3

NETWORK INTERFACE
EEE standard: IEEE 1588v2
IEEE standard: IEEE 1914.3 at 10G
CPRI line rate options 2 to 7
eCPRI at 10G
Physical interface: 4x SFP+ ports
Supported SFP+ modules: Multi Mode SR (850 nm), Single-Mode LR (1310 nm), MultiMode LRM (1310 nm), or Direct Attached Copper (Twinax)

CONFIGURATION
Board can boot from: onboard flash, micro-SD card or JTAG (selectable by DIP-switch)
Onboard flash can be updated via USB-JTAG or PCIe
Support for encrypted boot file (optional)

ON-BOARD MEMORY
128M x 32-bit LPDDR4@2133MT/s (total of 512MB memory)

ON-BOARD CLOCK
PCIe clock: 100MHz (from host)
PLL generated: 25/125 MHz (SyncE support (optional))
PLL generated: 156.25 MHz (SyncE support (optional))
PLL generated: 15.36 MHz
10 MHz oscillator (OCVCXO for PTP (optional))
48 MHz oscillator (for PS)

MPSoC VERSIONS AVAILABLE
XCZU7CG-1FBVB900E
XCZU4, XCZU5, EG, EV and other speedgrades on request

ENVIRONMENT
Physical dimensions: Half length, standard height PCIe
Power consumption: Max 40W
Operating temperature: 0 – 55°C, 30 – 130°F
Operating humidity: 20 – 80%
Hardware compliance: RoHS, CE
Passive cooling (no on-board fan required)

ADDITIONAL BOARD SUPPORT
On-board temperature sensors
Board status LEDs
FPGA controlled Link and Activity LED for each port
PPS clock synchronization connector (option)
EEPROM storage
4x output configurable PLL clock synthesizer (support for SyncE)
Fine adjustable 10MHz high stability oscillator
PPS clock synchronization connector

ADDITIONAL INTELLECTUAL PROPERTY MODULES
4G/5G L1 IP stack

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