SmartNIC Protocol Parser
Protocol Parser FPGA IP Logic Block for HFT Applications
Silicom Denmark Protocol Parser IP block provides ultra-fast filtering, decoding and normalization of market data feeds for HFT applications. Because the protocol processing is done in FPGA hardware, latency is significantly lower than can be achieved in software and is jitter free. Further, FPGA can readily handle line rate traffic, so micro-bursts will not overwhelm the FPGA or introduce latency or queuing. The Protocol Parser integrates seamlessly into the Silicom Denmark SmartNIC as a standard upgrade module and comes ready to use.
Lower Latency, No Jitter, Lower CPU Utilization
Silicom Denmark SmartNICs use state-of-the-art FPGAs, resulting in the lowest possible latency when compared to software. The advantage of using an FPGA increases as additional workloads are offloaded to it since more of the application stack is being processed in hardware without consuming CPU cycles, generating unnecessary interrupts or creating unwanted latency. Using Silicom Denmark SmartNICs with Protocol Parsing not only provides the lowest possible latency and no jitter, there is less demand placed on the CPU, and less need for trading firms to rely on the most advanced servers to the achieve the highest possible performance.
Line Rate Performance With No Dropped Packets
Silicom Denmark SmartNICs feature kernel bypass, TCP Offload Engine (TOE) and UDP Offload Engine (UOE), making them fully capable of handling line rate on all ports at the stated line rate of the adapter (10G, 40G or 25/50/100G) with no packet drops. This is a critical capability for HFT, and insures that micro-bursts and peak market activity can be handled.
Broad Support for Market Data Protocols and Exchanges
Silicom Denmark Protocol Parser IP block supports a wide range of options and equities exchanges. Protocols supported include XDP (Amex, Euronext, NYSE), Multicast PITCH (BATS), CSM (CBOE), MDI (ISE), TOM (MIAX), ITCH and ITTO (Nasdaq, Nasdaq OMX). The output of the Protocol Parser is normalized into a single uniform format based on the Silicom Denmark API, providing a simple interface to the trading software and further reducing the work required by the CPU.
Easy to Deploy
Silicom Denmark Protocol Parser IP block is part of a growing family of HFT FPGA building blocks that starts with ultra-low latency networking (kernel bypass, TCP Offload Engine, UDP Offload Engine) and goes all the way to complete Order Book. Silicom Denmark IP blocks integrate seamlessly into the SmartNIC product family, and can be purchased pre-integrated into the SmartNIC or as a separate IP block that can be integrated by the customer.
- Widely applicable with broad market data protocol & exchange support
- Reduces latency, eliminates jitter of protocol parsing
- Reduces workload on server CPU
- Integrates seamlessly into SmartNIC
- Provides single, uniform format for user application
Because the Protocol Parser executes in hardware, and also presents a single normalized format to the user application, the overall system performance can be dramatically improved. Further, the performance is more deterministic since common causes of latency (interrupts, contention for CPU cores, running out of memory) are eliminated. While many different measurements can be made to simulate worst case working environments, and performance will vary depending on many variables, Silicom Denmark testings has shown that its Protocol Parser IP block provides ~300ns performance improvement versus software processing.
Silicom Denmark Protocol Parser IP block is supported on all SmartNIC adapters for which a license is purchased.
Silicom Denmark Protocol Parser supports a growing list of protocols and exchanges, including XDP (Amex, Euronext, NYSE), Multicast PITCH (BATS), CSM (CBOE), MDI (ISE), TOM (MIAX), ITCH and ITTO (Nasdaq, Nasdaq OMX). Contact Silicom Denmark for an up-to-date list of supported protocols and exchanges.
Silicom Denmark Protocol Parser block is supplied as a Xilinx, Virtex 7 or Virtex ultrascale compatible IP block maintained to keep up with the latest version of Xilinx development tools. Various simulation models can be requested on demand from Silicom Denmark.