FBAP4@VP18-2L0SG

The Silicom Artena is an ultra‑high‑capacity FPGA accelerator that brings the full capabilities of the AMD Versal Premium VP1802 into a standard PCIe server card, delivering one of the highest logic densities available in a plug‑in form factor. With 3,360,896 LUTs, 14,352 DSP engines and 994 Mb of on‑chip PL memory, Artena provides an extensive programmable canvas for implementing custom data paths, protocol engines and offload functions directly in the server. Other Versal Premium FPGA models are supported by this card design.

This makes it ideally suited for high‑capacity application acceleration in standard server platforms. The card is purpose‑built to maximize available programmable logic for acceleration while maintaining optimal thermal and power characteristics for high effective logic utilization and is therefore designed as a pure accelerator.

 

For performance‑intensive workloads such as cybersecurity analytics, custom cryptography and PQC gateways, storage compression, low‑latency electronic trading and tightly optimized AI/ML inference, Artena enables ultra‑low‑latency execution on compact models and bespoke kernels that are difficult to map efficiently to GPUs. In these scenarios, a single Artena card can deliver significantly lower and more predictable end‑to‑end latency than GPU‑based solutions, while preserving the flexibility to evolve algorithms, protocols and data formats over time.
  • Application acceleration
    • Crypto offload
    • PQC application gateway offload
    • Storage compression offload
    • AI/ML inference offload
    • Data analysis offload

Key features

  • AMD Versal Premium VP1802 FPGA (XCVP1802-2LSEVSVA5601, Low power version)
  • PCIe 2×8 Gen5, PCIe 1×16 Gen4
    • The low power FPGA version does not support full BW for 2×8 Gen5
  • USB-C with FTDI for JTAG support
  • Series 2 Pearl Gecko (EFM32PG22) Board Management Controller
  • Single slot passive copper heat sink (Dual slot option on request)
  • On-board power and temperature sensors
  • FPGA controlled status LEDs

Specifications

FPGA Details AMD Versal Premium VP1802 FPGA (XCVP1802-2LSEVSVA5601)
Low power version Gen5 BW

  • VSVA5601
  • Fabric speed grade -2, Low power version with overdrive mode support

Card variants with VP1702, or VP2502, VP2802, can be made available on this design

Configuration
  • Configuration flash can be made to support multiple boot images with automatic fallback to factory default image
  • Upload of FPGA configuration to flash via PCIe – with supporting image and tool
On-board Memory
  • None
On-board Clock
  • PCIe clock: 100 MHz
  • 2 x LVDS User clocks, default 100MHz
Additional Board Support
  • On-board power and temperature sensors (via SMBus/I2C)
  • LEDs for board status and board management
Physical Dimensions
  • Weight: ~900 g
  • Full height, 123.4 mm
  • ¾ length, 254.0 mm (+bracket)
  • Single slot, Dual slot option
Environment
  • Storage temperature: -10C to 60C
  • Operating temperature: 0C to 40C
  • Hardware compliance: RoHS, FCC Class A, CE, UL
Thermal Design
  • Passive Single heatsink
  • Passive dual slot heat sink may be provided.
  • Increases thermal capacity, increasing processing capacity
Power/TDP
  • With 1 AUX power connected, Molex Mini Fit Jr. Right Angle
    • Max power (TDP) 150W, with ~1000 LFM server airflow for cooling
    • Typical power consumption 90W – 130W
  • With 2 AUX power connected, Molex Mini Fit Jr. Right Angle
    • Max power (TDP) 230W, with ~1000 LFM server airflow for cooling
    • Requires dual slot heatsink, available on request
    • Typical power consumption 130W – 200W
  • The combined server-PCIe card solution may be limited in average power consumption by thermal constraints. Maximum supported power is higher than TDP if adequate cooling is provided. Typical use cases are fully dependent on FPGA implementation.
Board Management
  • Series 2 Pearl Gecko (EFM32PG22) Board Management Controller
  • Voltage level monitoring and Over current protection on 12V input
  • Thermal shut-down protection
  • I2C and PLDM
Supported frameworks
  • Silicom Board support package
  • Silicom PacketMoverLight – Performance and latency optimized DMA engines
  • Myrtle Vollo Inference engine

Host Interface

PCI bus
  • PCIe 5.0 2×8 (Low power fabric mode limits )
  • PCIe 4.0 1×16

Ordering Information

 

Ordering P/N

Notes

FBAP4@VP18-2L0SG   FPGA look-aside PCIe card, VP1802, SG2 Low power, PCIe Gen4 2×8, Full Height, 3/4-length, passive cooling, Single slot heatsink
FBAP4@VP18-2L0PG FPGA look-aside PCIe card, VP1802, SG2 Low power, PCIe Gen4 2×8, Full Height, 3/4-length, passive cooling, Dual slot heatsink

 

 

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